With the development of digital techniques and the increment of complexity in detecting target background, the ability of rader's tracking target in background of jamming is required higher and higher. In this thesis, the principle of tracking target and the method of anti-jamming in velocity deception is studied, and a rader digital signal processor is designed and implemented. The content includes the following aspects:(1) The research on monopulse radar digital processor is reviewed, an implementing scheme is proposed.(2) By applying the DDC technology, FPGA technology, DSP technology, a digital signal processor is designed and implemented. In the designed system, amplitude and phase imbalances in monopulse sum and difference channels is calibrated first, and then the output signals from sum and difference channels are sampled and down-converted, angle error is extracted and the Doppler shift is calculated.(3) Design of circuit schemes and printed circuit board (PCB) are accomplished, In PCB design, signal integrity and power integrity are considered. Debugging and test of the hardware circuit are finished and the problems are solved.(4) The software programming of angle and velocity tracking loop in rader digital signal processor is finished and verified. a new anti-jamming algorithm in velocity deception is proposed. The results show that the algorithm is feasible and fulfilled the requirements.
